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Technique for Maintaining Data Integrity Across Functionally Different Buses

IP.com Disclosure Number: IPCOM000035375D
Original Publication Date: 1989-Jul-01
Included in the Prior Art Database: 2005-Jan-28
Document File: 1 page(s) / 12K

Publishing Venue

IBM

Related People

Clayton, ST: AUTHOR [+4]

Abstract

Whenever there is limited input/output signals available, data integrity can be maintained, according to the present technique, by utilizing a single parity bit. By encoding command signals uniquely, a single parity bit can be made to achieve the following characteristics: 1) The command bus and the output data bus are parity checked as one entity. 2) On WRITE commands, the parity bit indicates also the parity for the output data.

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Technique for Maintaining Data Integrity Across Functionally Different Buses

Whenever there is limited input/output signals available, data integrity can be maintained, according to the present technique, by utilizing a single parity bit. By encoding command signals uniquely, a single parity bit can be made to achieve the following characteristics: 1) The command bus and the output data bus are parity checked as one entity. 2) On WRITE commands, the parity bit indicates also the parity for the output data.

The hardware hookup to verify the present technique utilized a Parallel Printer Adapter interface to drive a Service Bus Adapter. It was connected physically by a long cable, in which all seventeen lines were utilized. The interface consisted of a one bit wide data bus plus parity, three-bit-wide command bus, and a five-bit-wide status bus. There were three registers in the Parallel Printer Adapter: one read- only register, one write-only register, and one write/read-register. The write/read register sends four bits of data to the Service Bus Adapter. The write-only register, which sends data to the Service Bus Adapter, contains the command bus and four bits of output data plus the parity bit.

The Service Bus Adapter hardware consisted of command logic, status logic, two control registers and a shift register. By using standard processor In and Out instructions, in the parallel Printer Adapter that controls the write-only register, the read-only register and th...