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Redundancy Scheme for Passive Superchips

IP.com Disclosure Number: IPCOM000035650D
Original Publication Date: 1989-Jul-01
Included in the Prior Art Database: 2005-Jan-28
Document File: 2 page(s) / 76K

Publishing Venue

IBM

Related People

Horbach, HG: AUTHOR [+4]

Abstract

A redundancy scheme is described which may be used for directly attached passive superchips acting as chip carriers.

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Redundancy Scheme for Passive Superchips

A redundancy scheme is described which may be used for directly attached passive superchips acting as chip carriers.

As illustrated in Fig. 1, the defective signal line, say, S1, and the redundant line, say, R1, are connected by redundant wiring on the card rather than on the silicon carrier. Before connecting the passive superchip (PSC) to the card, defective signal lines are detected by means of a test, and a dendrite/C4 mask is programmed on the basis of the test data.

As shown in Fig. 2, the dendrite/C4 connections can be placed either at the PSC perimeter or between the chip locations. If the signal line defect is attributable to a short, the line is laser cut before the described method is applied.

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