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Test Generation of AC Faults Using Weighted Random Patterns

IP.com Disclosure Number: IPCOM000035689D
Original Publication Date: 1989-Aug-01
Included in the Prior Art Database: 2005-Jan-28
Document File: 3 page(s) / 36K

Publishing Venue

IBM

Related People

Forlenza, DO: AUTHOR [+4]

Abstract

Weighted Random Patterns (WRP) test methodology is employed in this article to create an extremely efficient test for AC defects in all combinational and LSSD designs. The particular test methodology is explained at length in 1, but a very cost-effective algorithm is here developed around the procedure in the reference and fault simulation that will reduce the number of WRP patterns necessary to catch all of the AC faults, with significant savings in data definition and test time over previous methods.

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Test Generation of AC Faults Using Weighted Random Patterns

Weighted Random Patterns (WRP) test methodology is employed in this article to create an extremely efficient test for AC defects in all combinational and LSSD designs. The particular test methodology is explained at length in 1, but a very cost-effective algorithm is here developed around the procedure in the reference and fault simulation that will reduce the number of WRP patterns necessary to catch all of the AC faults, with significant savings in data definition and test time over previous methods.

An AC fault is defined as a defect that delays either a rising or falling transition on any input or output of a logic gate. The slow-to-rise fault behaves as a stuck-at-zero single stuck fault for some temporary period of time. Similarly, the slow-to-fall AC fault corresponds to the stuck-at-one single stuck fault. A test for an AC fault requires a sequence of patterns that create the appropriate transition at the point of the fault and also propagate the effect to a timed observable point. Pattern sequences must be created that allow an opportunity to test all classes of AC faults. The capturing event (primary output (PO) measure or system clock pulse) must be optimally timed relative to the primary input (PI) or latch change that launched the transition. AC faults are then classified according to how the transition is launched and how the effect is captured.

The typical WRP pattern sequence will contain the following events: 1) Load shift register with weighted random values. 2) Place weighted random values on PIs. 3) Measure POs into signature register. 4) Pulse latch clock. 5) Unload shift register into signature register.

Generally, it is not possible to satisfy all desired timings simultaneously. In such a case, the entire WRP test would be repeated twice, adjusting the timings between passes so that at least one pass would have the desired timing to detect each of the AC fault classes. After defining such pattern sequences to allow the detection of all AC faults, it is required that the weighting factors be determined that provide a sufficient probability to test each AC fault. This is accomplished through the use of the following algorithm (see the figure) and the test procedure and fault simulator identified in 1 and 2, respectively.

1) Create a set of pattern sequences that test all AC faults.

2) Create the set of AC faults which are to be detected.

3) Calculate the global set of weights 1.

4) For each sequence, use the PPSFP fault simulator 2 to fault simulate the precise WRP's that result from the selected set of weighting factors, eliminating AC faults as they become detectable. Patterns are simu...