Two-Dimensional Function Generator
Original Publication Date: 1989-Aug-01
Included in the Prior Art Database: 2005-Jan-28
Circuitry has been proposed for the determination of a continuous set of electrical values as a function of two independent variables for use in semiconductor applications. A combination of digital (memory, digital-to-analog converters) and analog circuitry are used in the development which is applicable to real-time control systems, hardware simulators, and hybrid computers. (Image Omitted)
Two-Dimensional Function Generator
Circuitry has been proposed for the determination of a continuous set of electrical values as a function of two independent variables for use in semiconductor applications. A combination of digital (memory, digital-to-analog converters) and analog circuitry are used in the development which is applicable to real-time control systems, hardware simulators, and hybrid computers.
It is often necessary to produce an electrical signal Z(X,Y) which depends on two independent input signals, X and Y, which vary in real time. Generally, Z (Fig. 1) is known at a set of sample points (Xi, Yi), (i=1,2,...NX), (j=1,2,...NY). It is desired to interpolate Z at all points within the range X1 & X & XNX, Y1 & Y & YNY .
Let Z represent the output of the function generator, an approximation to the desired function Z. It is desirable that: Z = Z at the sample points (Xi,Yj)
Z Z Z at other non-sample points (X,Y)
Z be continuous in X and Y and closely follow changes
in X and Y
without significant delay.
The proposed hybrid digital/analog function generator accomplishes the foregoing goals. A rudimentary overview of the function generator (Fig. 2) provides an illustration of its capabilities. The independent variables X and Y enter at the left and are sampled by analog-to-digital converters (ADCs) at clock times to, producing digitized approximations Xdo and Ydo to X(to) and Y(to). The underline symbol _ for X, Y, and Z indicates approximation, the d subscript indicates a digital value, and the o subscript indicates sampling at time to .
The two digitized values are concatenated to form a binary ad dress placed in the memory address register (MAR), specifying an address in the memory which will be accessed at time t1; t1 / to so as to allow for ADC settling and latching Xdo Ydo into MAR. At the same time Xdo and Ydo are presented to the digital- to-analog converters (DACs) which will, at time t2, convert them to analog voltages Xao and Yao; t2 / t1 to allow for completion of the memory access triggered at t1 . The data recalled from memory includes parameters describing the approximation surface in the vicinity of ( Xdo, Ydo), which are the value Z and the two first partial derivatives of Z w.r.t. X and Y evaluated at ( Xdo, Ydo). These digital values are fed to a DAC and two multiplying DACs (MDACs), with the conversions not triggered until time t2 . The DACs supplying Xao and Yao, as noted, are also triggered at time t2 . These signals are fed to differential amplifiers along with X(t) and Y(t) to form delta-X(t) = X(t) - Xdo and delta-Y(t) = Y(t) - Ydo Delta-X and delta-Y are the analog reference signals fed to the two MDACs which supply the signals to the output summing amplifier (OSA) to produce
The bandwidth of the OSA will generally be sufficiently narrow to eliminate any switching transients which may occur when [X(t), Y(t)] have varied sufficiently t...