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Enhanced Processor Error Detection Using Address Parity

IP.com Disclosure Number: IPCOM000035892D
Original Publication Date: 1989-Aug-01
Included in the Prior Art Database: 2005-Jan-28
Document File: 1 page(s) / 12K

Publishing Venue

IBM

Related People

Hilker, SA: AUTHOR [+4]

Abstract

Most processors having external control-store arrays for microcode are susceptible to undetected hardware errors on the array address lines. Without proper detection, a stuck fault or intermittent fault on the array address could result in the improper control word data being fetched. The address lines most susceptible to intermittent or stuck faults are ones that go to one or more off-chip arrays.

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Enhanced Processor Error Detection Using Address Parity

Most processors having external control-store arrays for microcode are susceptible to undetected hardware errors on the array address lines. Without proper detection, a stuck fault or intermittent fault on the array address could result in the improper control word data being fetched. The address lines most susceptible to intermittent or stuck faults are ones that go to one or more off-chip arrays.

Parity is first generated on the control-storage array address, stored into control store with the control word, and then finally checked by the processor when the control word is fetched at a later time. Any discrepancies between the parity bit fetched and the parity on the current address will cause a machine check indicating a control storage address parity error.

The control storage arrays used on the processor are oriented as 8K by 18 bits or as 4K by 18. In either case, three arrays are used to fulfill the 42 bits needed for the microcode control word, plus three more bits for existing parity checking on the control word itself. This results in 45 of the 54 bits being used in the arrays. Another bit may be utilized without requiring additional array hardware.

As the microcode is assembled, the address and data parity are automatically generated. Since the address of a control word is determined as it is assembled, it is quite easy to generate its parity at the same time. The address parity bit for each word...