Browse Prior Art Database

Transistor Array for Device Defect Diagnostics and Process Control

IP.com Disclosure Number: IPCOM000035945D
Original Publication Date: 1989-Aug-01
Included in the Prior Art Database: 2005-Jan-28
Document File: 3 page(s) / 59K

Publishing Venue

IBM

Related People

Barson, F: AUTHOR [+3]

Abstract

An efficient test structure is described by means of which failing devices can be identified during the measurement of large numbers of transistors. The disclosed test program, which can measure the characteristics of a single device in a matrix of devices, may also be modified to provide a vehicle for establishing device sizes and aspect ratios during planarization process steps.

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Transistor Array for Device Defect Diagnostics and Process Control

An efficient test structure is described by means of which failing devices can be identified during the measurement of large numbers of transistors. The disclosed test program, which can measure the characteristics of a single device in a matrix of devices, may also be modified to provide a vehicle for establishing device sizes and aspect ratios during planarization process steps.

Relating collector-emitter leakage failures to physical defects in a device is complicated by the difficulty of localizing the leakage source. Voluminous testing is required, in particular with small devices, where the area to be examined is small, but the probability of identifying a defect is low. The structure here described consists of an array of small transistors, so interconnected as to allow for a relatively efficient detection of specific devices which are leaky. Employed prior to metallization, the disclosed structure acts to considerably simplify subsequent failure analysis procedures.

(Image Omitted)

By way of illustration, a simple 3 x 3 array and connections are shown in Fig.
1. Trenches 1 are used to isolate rows of transistors in the array, the devices in each row having a common collector which is extended to a reach-through area sufficiently large to allow for electrical probing. N+ polysilicon emitter lands 2 are used to connect all emitters in each column, separately from other columns of emitters. The P+ polysilicon base land 3 is also extended to a pad large enough for electrical probing. By probing a given collector pad and a given emitter land, a single transistor is addressed uniquely to see if it is leaky. A common base contact can be made to all of the transistors in the array, if desired, using the base polysilicon to bias the base, as needed.

(Image Omitted)

In practice, a 50-probe contact system could be employed to probe a 25 x 24 array, leaving the one remaining probe for the base connection. This would allow all 600 small devices to be first probed in parallel to determine if leakage was present in any. If found, all columns could then be connected in parallel and each row probed separately to locate the row containing the leaky unit. That row would then be contacted, and each column probed separately to locate the specific failing device, for physical diagnostics.

The disclosed transistor array test structure has been shown capable of efficiently isolating individual device failures from among a large number of similar devices in a matrix. It may also be applied to device process control problems, e.g., by serving as a vehicle for evaluating planarization quality during device fabrication. However, unlike the transistor array test structure illustrated in Fig. 1, that shown in Fig. 2, th...