Browse Prior Art Database

DUAL MASTER BUS ISOLATOR

IP.com Disclosure Number: IPCOM000035946D
Original Publication Date: 1989-Aug-01
Included in the Prior Art Database: 2005-Jan-28
Document File: 3 page(s) / 95K

Publishing Venue

IBM

Related People

Johnson, WJ: AUTHOR [+4]

Abstract

This article describes a mechanism which isolates two different microprocessor buses.

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DUAL MASTER BUS ISOLATOR

This article describes a mechanism which isolates two different microprocessor buses.

Rapid growth in the multi-microprocessor system environment has produced a need for bus isolation for a dual microprocessor system. The dual master bus isolator disclosed herein is shown in block diagram in Fig. 1. It permits two microprocessor systems to function independently, while allowing each other's resources to be shared. The dual master bus isolator performs the bus arbitration needed to resolve possible contention. The accessing from one bus to another is accomplished by treating each bus as a virtual address. By doing so, the boundary between these two systems is transparent to each processor.

The isolator is a mechanism for interconnecting two separate microprocessor systems for enabling them to share each other's resources while still retaining the ability of operating independently of one another. The primary feature is the manner in which one system gains access to the other. This is accomplished by means of virtual addressing. Fig. 2 shows the dual master bus isolator mechanism in detail. Each system also has a non-physical (virtual) address range for which it has no physical storage components. Each microprocessor uses these non-physical addresses to access the physical storage in the other microprocessor system. Hardware logic circuitry interconnects the two microprocessor buses. When one microprocessor issues a DUAL MASTER BUS ISOLATOR - Continued

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non-physical address, this is detected by the bus interconnecting logic circuitry which also converts the non-physical address to a physical address for the other microprocessor system. This bus connecting circuitry puts the converted address on the address bus of the second system and also activates signal transfer circuits interconnecting the data buses of the two systems. This enab...