Browse Prior Art Database

N Bit Sampling Half Flash Analog to Digital Converter Using Only 2N/2 Comparators

IP.com Disclosure Number: IPCOM000035998D
Original Publication Date: 1989-Aug-01
Included in the Prior Art Database: 2005-Jan-28
Document File: 2 page(s) / 90K

Publishing Venue

IBM

Related People

Hauviller, P: AUTHOR

Abstract

This circuit could cover the middle range of analog-to-digital converters (ADCs):6 or 8 or 10 bits (with careful design). It offers a good trade-off performance versus power consumption or size. As an example, an 8-bit ADC operates at 1 MHz sampling rate, power consumption is below 50 m W (worst case with a reference voltage), and a size smaller than 2 mm2 . So, such an ADC is faster than a successive approximation ADC; of course, it is slower than a full flash or a sub ranging ADC, out size and power consumption are much smaller.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 75% of the total text.

Page 1 of 2

N Bit Sampling Half Flash Analog to Digital Converter Using Only 2N/2 Comparators

This circuit could cover the middle range of analog-to-digital converters (ADCs):6 or 8 or 10 bits (with careful design). It offers a good trade-off performance versus power consumption or size. As an example, an 8-bit ADC operates at 1 MHz sampling rate, power consumption is below 50 m W (worst case with a reference voltage), and a size smaller than 2 mm2 . So, such an ADC is faster than a successive approximation ADC; of course, it is slower than a full flash or a sub ranging ADC, out size and power consumption are much smaller.

The switched capacitor technique applied on CMOS technology (with good capacitors) allows the performance of both functions: sampling the input signal and conversion into digital binary code. Three phases are necessary to get the digital output: sampling phase,

MSB bits determination, and

3rd-phase LSB bit determination.

Only 2N/2 comparators are necessary to perform the two-step conversion, since the same set of comparators are used for both steps. 2N/2

(Image Omitted)

The comparison levels are provided by a DAC (digital-to-analog converter) functioning circuit (8-bit DAC with a 10-bit accuracy), but it has 2N/2 outputs instead of a single one for a DAC.

The basic comparator cell (Fig. 1) comprises 4 switches, a capacitor and a comparator/amplifier. 2N/2 such cells are used in a N bit ADC (16 for an 8-bit ADC), such as shown in Fig. 2. Three clocks drive...