Browse Prior Art Database

ECC Controller for Memories

IP.com Disclosure Number: IPCOM000036021D
Original Publication Date: 1989-Aug-01
Included in the Prior Art Database: 2005-Jan-28
Document File: 2 page(s) / 50K

Publishing Venue

IBM

Related People

Michels, H: AUTHOR [+4]

Abstract

Error correction codes (ECCs) for memories are generally designed for 2-bit error detection and 1-bit correction. If applied to 3-bit errors, they would lead to a 1-bit error indication, with the 1-bit correction carried out in response to damaging user data. To avoid this, an ECC controller is proposed.

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ECC Controller for Memories

Error correction codes (ECCs) for memories are generally designed for 2-bit error detection and 1-bit correction. If applied to 3-bit errors, they would lead to a 1-bit error indication, with the 1-bit correction carried out in response to damaging user data. To avoid this, an ECC controller is proposed.

The concept used is to analyze errors by specific retry operations, regardless of whether a 1- or a 2-bit error has occurred. The procedure followed is shown in the flowchart and described below.

Branch conditions are prompted by standard ECC indications, such as 1- and 2-bit errors. The operations performed in response to such conditions are 1-bit error correction (correct), the inversion of the actual bit pattern (invert) and standard memory store/read cycles (store, read).

The results of the analysis are divided into two groups

exit C0,..., C3 no error/correctable error

exit I0,..., I6 serious/uncorrectable error

The error types possible are listed below each exit, with "D", "H" and "S" being defined as follows 1. "D" = defect

A memory cell is permanently "0" (or "1"). The

stored data is not changed by the defect.

2. "H" = hard error

A memory cell is permanently "0" (or "1"). The

stored data is changed by the defect.

3. "S" = soft error

A stored data bit has been inverted for some

reason. The error is not reproducible.

Exit C0, for example, normally points to a "no error" state, i.e., processing continues. There may be a maximum num...