Browse Prior Art Database

PROTECTING Si WAFERS AGAINST DAMAGE DURING TESTING

IP.com Disclosure Number: IPCOM000036118D
Original Publication Date: 1989-Sep-01
Included in the Prior Art Database: 2005-Jan-28
Document File: 2 page(s) / 24K

Publishing Venue

IBM

Related People

Gruber, HW: AUTHOR [+3]

Abstract

During testing, Si wafers are contacted by needles. A Ti or Cr diffusion barrier and a Cu layer are positioned between the gold of the connector pads and the underlying AlCu conductor. When such very thin layers are mechanically contacted, the Cu and the diffusion barrier are penetrated, leading to the corrosion of Au/Al and considerably reducing the reliability of the electrical connection.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 100% of the total text.

Page 1 of 2

PROTECTING Si WAFERS AGAINST DAMAGE DURING TESTING

During testing, Si wafers are contacted by needles. A Ti or Cr diffusion barrier and a Cu layer are positioned between the gold of the connector pads and the underlying AlCu conductor. When such very thin layers are mechanically contacted, the Cu and the diffusion barrier are penetrated, leading to the corrosion of Au/Al and considerably reducing the reliability of the electrical connection.

To prevent this, a double pad structure, as shown in the figure, is used. The inner pads 1 of this structure serve as test pads which are provided with a PbSn protective layer by means of special masks. This protective layer is not penetrated by the test needles. The outer pads 2 act as electrical connectors by wire bonding or TAB (tape automated bonding) and are connected to the inner pads 1 by short conductor sections 3. The outer pads 2 are provided either with a relatively thin PbSn layer, which does not impair the bonding process, or with aluminum bumps.

The principle of the thin PbSn layer may also be used for pads which are later on provided with PbSn solder balls of chips (flip-chip technology). The resulting increase in volume of the solder balls is a desirable feature.

1

Page 2 of 2

2

[This page contains 1 picture or other non-text object]