Browse Prior Art Database

Efficient Mechanism for Providing Permanent Long Addresses

IP.com Disclosure Number: IPCOM000036197D
Original Publication Date: 1989-Sep-01
Included in the Prior Art Database: 2005-Jan-28
Document File: 5 page(s) / 95K

Publishing Venue

IBM

Related People

Tetzlaf, W: AUTHOR

Abstract

This article describes a way to extend current hardware and software systems to allow much longer addresses, which are really names, and to make those names permanent.

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Efficient Mechanism for Providing Permanent Long Addresses

This article describes a way to extend current hardware and software systems to allow much longer addresses, which are really names, and to make those names permanent.

Current hardware generally uses registers of 32 or fewer bits for address generation purposes. Those addresses pointers are generally short-lived, in that they do not persist across jobs, sessions or op-

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erating system failures. This is because the address pointers are intimately related to the real address. Even in most virtual memory systems the addresses are too small to avoid reuse of addresses and are generally initialized at each job or session. It would be very useful if existing hardware could be simply extended to allow for much longer addresses, so long that they might be termed names. This is due to the large number of potential objects that a large system might wish to have available. It would also be useful if those names could be made to survive sessions, jobs and operating system failures. This would be useful in extending the apparent availability of the system. This proposal allows such characteristics, without sacrificing performance. In the past it was necessary to do a variation on interpretive execution to gain this character. This is done by using a name to location translation mechanism on each reference. This proposal would have some overhead on initial connection, but would allow normal addressing to follow from that point.

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The primary mechanism to be used is a lookaside of recently translated long name to current address pairs. This is similar to the Translate Lookaside Buffer (TLB) used in 370 Architecture to fast path virtual to real translations. However, this is extended in two ways. First the translation is really name-to-real address. Second, mechanisms are provided to make the translation more long-lived.

A number of assumptions are made about the hardware and software. For compatibility, and other reasons, it is useful to have this feature be an addition to a current hardware architecture. Thus, any micro, mini, or mainframe computer that uses registers for addressing could be modified in order to get this capability.

It is assumed that a software translation, sometimes called a name server, exists to do name-to-location conversions. Due to the restrictions on the real memory size, it is assumed that such translations are not permanent. At times it is necessary to cast out no longer in use data, thus invalidating previous translations. The deletion of objects would also cause the need to invalidate prior translations.

It is assumed that a work management system exists that knows units of work and dispatches work. In most systems individual units of work have a unique ID for each unit of work. Several optimizations are provided for multi- programming and multi-processing systems where the unit of work is known.

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Most CPU architectu...