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Yield Enhancement by Optimum Use of Redundant Bit Lines

IP.com Disclosure Number: IPCOM000036217D
Original Publication Date: 1989-Sep-01
Included in the Prior Art Database: 2005-Jan-28
Document File: 2 page(s) / 39K

Publishing Venue

IBM

Related People

Nguyen, Q: AUTHOR

Abstract

By locating redundant bit lines near the center of input/output (I/O) arrays and by having a single redundant data line passing through several pass devices that are decoded by fuse programming, redundant elements in one array can be used to replace a bad bit in any other array. Thus, a number of bad bits in one array which would normally exceed the number of replacements available within the array can now be fixed by using replacements within another array.

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Yield Enhancement by Optimum Use of Redundant Bit Lines

By locating redundant bit lines near the center of input/output (I/O) arrays and by having a single redundant data line passing through several pass devices that are decoded by fuse programming, redundant elements in one array can be used to replace a bad bit in any other array. Thus, a number of bad bits in one array which would normally exceed the number of replacements available within the array can now be fixed by using replacements within another array.

Referring to Fig. 1, redundant data lines 6 of I/O 2 are connected to data lines 8 of I/O 4 to form a single redundant data line. Redundant data lines of I/O 1 and I/O 3 are also connected to form a single redundant data line 10. Fig. 2 shows some internal detail of redundant BL circuits, e.g., 12 or 14 of Fig. 1. Serial devices (e.g., transistors T1, T2, T3, etc.) are used to steer or allocate common redundant BLs 18 through 24 to serve needy I/Os. Fuse-programmed circuits in 16 can select gates of the serial devices, thus assigning redundant BL circuits as needed.

Benefit of use of this method may be taken as a yield improvement or in reduced circuit area by having fewer redundant lines.

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