Browse Prior Art Database

Method for Making a Dynamic Random-Access Memory Cell

IP.com Disclosure Number: IPCOM000036222D
Original Publication Date: 1989-Sep-01
Included in the Prior Art Database: 2005-Jan-28
Document File: 3 page(s) / 53K

Publishing Venue

IBM

Related People

Beilstein, KE: AUTHOR [+4]

Abstract

By using a silicon-on-oxide (SOI) process, a borderless shared contact and borderless trench to storage node strap are made possible. A dynamic random-access memory (DRAM) cell is constructed in dimensions below normal limits of the photo process.

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Method for Making a Dynamic Random-Access Memory Cell

By using a silicon-on-oxide (SOI) process, a borderless shared contact and borderless trench to storage node strap are made possible. A dynamic random- access memory (DRAM) cell is constructed in dimensions below normal limits of the photo process.

Referring to the figure, a cross-section of a passing word line cell, trench storage nodes are defined in substrate 2, lined with node dielectric 4, filled with conductive polysilicon 6 and planarized, all by standard processing. Oxide 8 is then deposited. Next, silicon layer 10 is formed over oxide 8 by a technique, such as that described by J. B. Lasky, et al, in the paper, "Silicon-On-Insulator (SOI) by Bonding and Etch-back," presented at IEDM Conference, December 1985. An oxide layer is deposited (not shown, since it is removed later) as a protective layer for silicon 10 and also for an etch stop later in the process. N island regions (not shown) for p-channel devices are then implanted using a block mask. Additional n-type dopant is implanted at the bottom of silicon layer 10 to be used in interconnection to channel regions of p-channel devices. After photoresist stripping, another block mask is used to define P island regions (not shown) for n-channel devices formed by another implant. Additional p-type dopant is im planted at the bottom of silicon layer 10 to act as interconnection to channel regions of n-type devices. Resist for the block mask is then removed and an island isolation mask is defined and the exposed protective oxide layer is etched off.

Following stripping of the isolation mask photoresist, an interconnect mask is defined. This interconnect mask is a negative of a word line mask to be used later. After development of the interconnect pattern, a conformal coating of an organic material is deposited and reactive ion etched to result in shrinkage of resist openings by the thickness of the conformal coating left on the vertical walls of the original photoresist opening. Image reversal of the structure is obtained by next conformally depositing an ino...