Browse Prior Art Database

Irritator, a Tool for Providing External Stimulation for Device Testing

IP.com Disclosure Number: IPCOM000036272D
Original Publication Date: 1989-Sep-01
Included in the Prior Art Database: 2005-Jan-28
Document File: 2 page(s) / 54K

Publishing Venue

IBM

Related People

Long, GB: AUTHOR [+2]

Abstract

Disclosed is a tool used to stress a device during simulation by providing external stimulation (irritants) in a controlled manner.

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Irritator, a Tool for Providing External Stimulation for Device Testing

Disclosed is a tool used to stress a device during simulation by providing external stimulation (irritants) in a controlled manner.

The irritator consists of two parts:

1) a model of the environment outside the device

under test, and

2) the ability to provide a controlled stimulus

to the device.

A processor complex will be used as an example of a device under test.

The environment outside the processor complex would be the I/O channel and enough functional emulation of devices on the channel to test the processor. The model would also include behaviorals for any functions included in a full system that are not part of the device under test but are required for testing. This external environment allows the simulation to be run without any abnormal operation of the device under test.

The irritants would be any signals generated outside the processor complex that are used by the processor in normal operation. These include interrupts, DMA requests, etc. Additional irritants are those conditions that the processor is required to handle that are not normal events, specifically error conditions. Some error conditions (i.e., parity errors) would be impossible to generate in a normal environment.

For maximum utility the irritator is designed to fit into the testing environment such that the signals injected by the irritator can be defined to occur so that specific system conditions can be generated....