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Improved Definition for Supervisor Calls in a RISC Processor

IP.com Disclosure Number: IPCOM000036309D
Original Publication Date: 1989-Sep-01
Included in the Prior Art Database: 2005-Jan-28
Document File: 2 page(s) / 61K

Publishing Venue

IBM

Related People

Groves, RD: AUTHOR

Abstract

For operating systems in which many of the operating system services can be dynamically allocated, the supervisor call (SVC) number will vary depending on the number of services currently active and the order in which they were activated. This implies that the compiler cannot predetermine the SVC number in the SVC instruction at compile time. For this and many other reasons, the operating system actually creates the SVC instructions for the services as they are allocated in a special location in the supervisor storage. The user's code performs a branch and link to the appropriate SVC instruction location so that as the SVC number varies, the user's code does not.

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Improved Definition for Supervisor Calls in a RISC Processor

For operating systems in which many of the operating system services can be dynamically allocated, the supervisor call (SVC) number will vary depending on the number of services currently active and the order in which they were activated. This implies that the compiler cannot predetermine the SVC number in the SVC instruction at compile time. For this and many other reasons, the operating system actually creates the SVC instructions for the services as they are allocated in a special location in the supervisor storage. The user's code performs a branch and link to the appropriate SVC instruction location so that as the SVC number varies, the user's code does not.

In the operating system environment just described, the SVC instruction does not need to have the ability to compute the SVC number at run time. In both ROMP and 801, the SVC instructions had this ability. For a RISC processor design with multiple overlapped functional units, instructions and instruction sequences which force synchronization between units are to be avoided to achieve maximum performance. A classical SVC instruction definition which allows the SVC number to be computed at run time using a General Purpose Register would force unneeded synchronization between the branch and fixed- point units. For this reason the SVC instruction should pass the SVC number in the instruction itself as an immediate data field. To avoid further synchronization, this SVC number needs to placed into an architecturally visible register which resides in the branch unit instead of a register...