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Half-Current Switch With Push-Pull Output Stage

IP.com Disclosure Number: IPCOM000036324D
Original Publication Date: 1989-Sep-01
Included in the Prior Art Database: 2005-Jan-28
Document File: 2 page(s) / 36K

Publishing Venue

IBM

Related People

Carter, EL: AUTHOR

Abstract

A half-current switch (HCS) circuit, although featuring an attractive speed X power product at typical loading, can have a large delay sensitivity to capacitive loading. This sensitivity is due to the down- going transition associated with the output emitter-follower stage. The down-going transition can be improved by using a smaller pull-down resistor (Rpd), but this significantly increases the circuit's DC power dissipation.

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Half-Current Switch With Push-Pull Output Stage

A half-current switch (HCS) circuit, although featuring an attractive speed X power product at typical loading, can have a large delay sensitivity to capacitive loading. This sensitivity is due to the down- going transition associated with the output emitter-follower stage. The down-going transition can be improved by using a smaller pull-down resistor (Rpd), but this significantly increases the circuit's DC power dissipation.

The disclosed circuit (see figure) reduces the capacitive sensitivity of the HCS circuit, while maintaining a reasonable DC power dissipation by introducing a push-pull output stage. Devices T1-T4 and R1-R2 are added to an improved HCS circuit to accommodate the push-pull output stage. T1, T2 and R1 provide an active pull-down for the output emitter-follower stage when one or both of the inputs are at a logical up level. Once the output is down (below Vref), this active pull-down is shut off via the current switch comprising T3, T4 and R2.

Current is switched from T3 to T4, pulling down the base of T2 enough to turn off T1 and T2. During the down-going transition, T3 and Rpd also provide pull- down current. By shutting off the active pull-down after the down-going transition has been completed, the DC power requirement is minimized.

When both inputs are at a logical down level, the output is up and the active pull-down is held off via the voltage drop across R1 according to the current supplie...