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Capability to Steer a Spare Bit Without Introducing a Soft Error

IP.com Disclosure Number: IPCOM000036362D
Original Publication Date: 1989-Sep-01
Included in the Prior Art Database: 2005-Jan-29
Document File: 1 page(s) / 12K

Publishing Venue

IBM

Related People

Hardell, WR: AUTHOR [+2]

Abstract

Disclosed is a means to steer the spare bit into any data-bit position while the machine is operating without introducing a soft error in memory.

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Capability to Steer a Spare Bit Without Introducing a Soft Error

Disclosed is a means to steer the spare bit into any data-bit position while the machine is operating without introducing a soft error in memory.

Bit steering (sometimes referred to as sparing) is a means of increasing system memory reliability. A spare bit is logically steered into a failing bit position, effectively replacing it. This scheme requires the capability to simultaneously write the failed bit position and the spare bit position on memory- write-only. This capability is in addition to the ability to steer the spare bit position on both reads and writes to memory. This steer-on-write-only capability allows the entire spare bit column to be initialized with the correct data value before the full read/write bit-steering function is enabled. Without this capability, soft errors are introduced if the spare bit is steered into place during the system operation.

To initialize the spare bit position before the bit-steering is enabled, the bank of memory is scrubbed. Scrubbing is where the memory data is read from memory, single bit errors are corrected, and corrected data is written back to memory. By scrubbing the affected bank of memory (with the spare bit receiving the same data as the failed bit position), the entire spare bit column can be initialized. Once the spare bit is initialized, full bit-steering can be enabled effectively, replacing the failed bit position with a functional and ini...