Browse Prior Art Database

Channel Storage Microword RETRY Description

IP.com Disclosure Number: IPCOM000036379D
Original Publication Date: 1989-Sep-01
Included in the Prior Art Database: 2005-Jan-29
Document File: 2 page(s) / 61K

Publishing Venue

IBM

Related People

Cheney, DP: AUTHOR [+3]

Abstract

Disclosed is a procedure to recover from storage errors detected during channel-initiated storage operations. A combination of I/O hardware, I/O microcode, and Support Processor (SP) recovery code is employed to accomplish this task.

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Channel Storage Microword RETRY Description

Disclosed is a procedure to recover from storage errors detected during channel-initiated storage operations. A combination of I/O hardware, I/O microcode, and Support Processor (SP) recovery code is employed to accomplish this task.

The one thing that makes this whole procedure possible is the fact that storage words issued from the I/O engine are "Suspend/Resume" microwords. This means that whenever a storage word is issued, the hardware suspends processing until a status indication is returned from the storage hardware. The I/O engine then resumes processing at one of two possible points in the instruction stream based upon the status indication. These points are referred to as the "0-leg" and "1-leg" of the RESUME. Good status results in the "0-leg" and continuation of normal processing, while an error indication forces the "1-leg" which will take the I/O microcode through error-handling procedures. There is an 8-bit hardware register that is used to pass the storage status back, called the Storage Status (STSTAT) register.

Hardware must also save the address of the failing storage microword. The address is taken from the Control Store Address Register (CSAR) and is saved in a separate hardware register. This CSAR-backup register will be used to retry the failing storage operation.

Processing in the I/O engine is halted when the storage error occurs. As with any hardware-detected failure, recovery code is invoked in the SP that will reset the failing hardware and allow the I/O engine to be restarted. When it is restarted, hardware will for...