Browse Prior Art Database

Spacer-Defined Strap

IP.com Disclosure Number: IPCOM000036395D
Original Publication Date: 1989-Sep-01
Included in the Prior Art Database: 2005-Jan-29
Document File: 2 page(s) / 59K

Publishing Venue

IBM

Related People

Kenney, DM: AUTHOR

Abstract

In the construction of dynamic random-access memory cells, a single silicon strap-connecting region is etched to form two strap connections serving two separate trenches. The region to be etched is defined by self-aligning techniques, thus reducing area required to make two-device structures.

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Spacer-Defined Strap

In the construction of dynamic random-access memory cells, a single silicon strap-connecting region is etched to form two strap connections serving two separate trenches. The region to be etched is defined by self-aligning techniques, thus reducing area required to make two-device structures.

Fig. 1 is a plan view showing location of gate conductors 2 and 4 disposed over polysilicon regions 6 and 8. A selectively grown silicon region 10 is the hatched area.

Fig. 2 is a cross section of the Fig. 1 structure at A-A. A capacitor structure (not shown in Fig. 1) is comprised of polysilicon 12 and capacitor dielectric regions 14 and 16. Gate conductors 2 and 4 are constructed over cap silicon dioxide (SiO2) layer 18 and have a protective overlayer of silicon nitride (Si3N4)
20. By applying a conformal coating of Si3N4 and performing an anisotropic etch on the nitride, protective sidewall coatings 22 remain. The exposed area of layer 18 is then etched away. Selective silicon 10 is next deposited.

In Fig. 3, an additional conformal coating of Si3N4 or a selectively removable material is applied and anisotropically etched to form sidewall extensions 24. Anisotropic etching of silicon and SiO2 results in the cross section shown, leaving the desired straps of selective silicon layer 10. The devices are completed by conventional processing.

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