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Browse Prior Art Database

Integrated Power Plane Decoupling

IP.com Disclosure Number: IPCOM000036429D
Original Publication Date: 1989-Sep-01
Included in the Prior Art Database: 2005-Jan-29
Document File: 3 page(s) / 50K

Publishing Venue

IBM

Related People

Brown, MB: AUTHOR [+3]

Abstract

Disclosed is a design cross section for a Printed Circuit Board (PCB) technology which exhibits low noise and high band-width characteristics.

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Integrated Power Plane Decoupling

Disclosed is a design cross section for a Printed Circuit Board (PCB) technology which exhibits low noise and high band-width characteristics.

The PCB power plane inductance and capacitance are functions of the geometric cross section, as described by the following equations: Lx = 51 (ln (w/w+t) + 2.75 d/w) nH Ref.2 (1)

where

Lx = self inductance of conductor in nanoHenries

ln = natural logarithm

l = length of conductor in inches

w = width of conductor in inches

t = thickness of conductor in inches

d = distance between conductors in inches

and

Leff = L1 + L2 - (M1 + M2) nH

where

Leff = effective inductance of conductor in nanoHenries

L1 = self inductance of power plane 1

L2 = self inductance of power plane 2

M1 = mutual inductance from power plane 1 to 2

M2 = mutual inductance from power plane 2 to 1

and

C = Ke (A/D) 8.85 e-12

where

C = decoupling capacitance

Ke = dielectric constant

A = surface area common to both planes

D = distance between surfaces

A high decoupling capacitance is achieved between power planes by selecting dielectric materials, compatible with desired processes, that possess the highest possible dielectric constant (Ke), (i.e., Barium Titanate, etc.). This capacitance is also increased significantly by decreasing the distance between the power planes, which in turn decreases the plane inductance. These parameters are only limited by the choice of materials, manufacturing processes and geometric cross section.

Current and future PCB technologies are restricted in their applications of high performance circuits and increased switching characteristics due to delta-I noise and noise generated by the switching of the printed circuit nets.

(Image Omitted)

The following equations characterize these two noise components as:
Vn = Leff (di/dt) Volts (4) where Vn = delta-I noise

Leff = effective plane inductance

1

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di/dt = rate of change of current w.r.t. time

and

Vqfe = -dv/dt Ct/Co (K1-Kc)/59.9 mV/cm (5) for 2T Tr, where

Vqfe = far-end noise on quiet signal line

dv/dt = rate of change of signal voltage w.r.t. time

Ct = total capacitance of the quiet card net...