Browse Prior Art Database

Peer Packet Communication Computer Enhancement and Coexistence With Cycle-Steal Channels

IP.com Disclosure Number: IPCOM000036441D
Original Publication Date: 1989-Sep-01
Included in the Prior Art Database: 2005-Jan-29
Document File: 8 page(s) / 60K

Publishing Venue

IBM

Related People

Chorpenning, JS: AUTHOR [+7]

Abstract

A technique is described whereby a high-speed packet communication enhancement provides peer-to-peer operations between input/output (I/O) adapters and memory of a computer system. The concept utilizes either a system processor, or a connection server, to provide connection addresses among the peers. The concept makes use of the (Image Omitted) cycle-steal channel, as found in many computers, and requires no memory to implement peer connections. The concept emphasizes the coexistence of high-speed packet communications and the cycle-steal channel and describes the involved implementation and timing criteria.

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Peer Packet Communication Computer Enhancement and Coexistence With Cycle-Steal Channels

A technique is described whereby a high-speed packet communication enhancement provides peer-to-peer operations between input/output (I/O) adapters and memory of a computer system. The concept utilizes either a system processor, or a connection server, to provide connection addresses among the peers. The concept makes use of the

(Image Omitted)

cycle-steal channel, as found in many computers, and requires no memory to implement peer connections. The concept emphasizes the coexistence of high- speed packet communications and the cycle-steal channel and describes the involved implementation and timing criteria.

The peer-packet concept allows peer operations between I/O adapter devices using either the system processor, or a connection server, to provide connection addresses among the peers. To establish the connection, the requesting peer adapter sends a connection request to the connection server. The connection server searches a table for the corresponding requested service. If the services are allowed, a

(Image Omitted)

message is sent with the destination connection address to the requesting peer, now called the "source". The source then sends a packet data command to the destination on the bus.

Peers are virtually connected through the system bus by using the logical address for both the source and the destination. When the data transfer operation is completed, the bus connection ends and other connections may be performed. If there is no connection server, the connection address may be made available at initialization time by utilizing a control block, or in the case of source routing the connection address may be part of the communications data.

The peer-packet communications enhancement is designed to eliminate memory transfer, fetch operations and management so as to improve throughput by a factor of up to four times, when compared to prior art. In addition, the enhancement is designed to improve system and I/O device connectivity.

The ability to have high-speed packet communication coexist on the cycle- steal computer channel allows faster data transmission rates and is compatible with existing I/O adapters. This capability allows new applications to be applied to systems, such as real-time communications switching. The concept is an improvement over systems which used the burst-mode operation. In that case, the operation merely allowed multiple cycle-steal bus operations to be performed consecutively and had no restrictions on the number of cycles during which the bus would be busy.

To illustrate the implementation of the peer-packet

1

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communication

(Image Omitted)

enhancement architecture, the IBM Series/1 is used as a typical computer for the control of the data transfers. The general format of the packet transfer block (PXB) data transfer command and qualifier words are structured as shown in Fig. 1. 1WORD 00 1. S--Bit...