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Roll-Back Interrupt Method for Out-Of-Order Execution of System Programs

IP.com Disclosure Number: IPCOM000036462D
Original Publication Date: 1989-Oct-01
Included in the Prior Art Database: 2005-Jan-29
Document File: 4 page(s) / 69K

Publishing Venue

IBM

Related People

Chang, JH: AUTHOR [+2]

Abstract

A technique is described whereby a simple roll-back method combines both hardware and software to achieve a precise interrupt in a linear pipeline with out-of-order execution on systems, such as the IBM System/370. The concept is an improvement in very large-scale integrated (VLSI) circuitry environments when the driving capability and wiring restrictions are of major concern.

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Roll-Back Interrupt Method for Out-Of-Order Execution of System Programs

A technique is described whereby a simple roll-back method combines both hardware and software to achieve a precise interrupt in a linear pipeline with out- of-order execution on systems, such as the IBM System/370. The concept is an improvement in very large-scale integrated (VLSI) circuitry environments when the driving capability and wiring restrictions are of major concern.

Typically, conventional methods of achieving precise interrupt operation for a linear pipeline organization is to have a put-away stage at the end of the pipeline. At this stage, results of execution are checked for exceptions. If there is an exception, then a program interrupt is raised and all the execution results kept in pipeline registers before the put-away stage are discarded without modifying the machine state. Precise interrupt is guaranteed since all the machine state updates are strictly sequential.

However, a potential disadvantage of this method is that the following instructions, which depend on the results of the current instruction, have to wait until it reaches the put-away stage. To circumvent this problem, a lot of bypass, or wrap-around logic [1] is required to bypass the results from the pipeline registers to where they may be needed immediately. The bypass logic may slow down the clock if not used selectively. This is especially prominent in MOS VLSI environments where restricted interconnection and low driving capability are known problems.

Alternative methods of shortening the pipeline interlock time by allowing updating of the machine state as early as possible, while keeping the old state in a history buffer, have been proposed 2. When an exception occurs, out-of-order executions are detected and the machine state is restored to the correct state, from the history buffer, before branching to the exception service routine. The history buffer can be incremented and implemented as a stack. The state is restored by rolling back incremental changes to the point of the exception. There are several advantages with this method: 1. All the bypass logic no longer exists in the

regular data path.

2. Pipeline registers, which are used to keep the

changed

machine state in the put-away method are in the

form of a

roll-back stack. Only accesses to the

top-of-stack, rather

than to all registers, are required.

3. For memory updates, the roll-back method fits

nicely with

store operations in the MRU cache 3, where the old

contents are read out and put into extra rows of

memory cells before the actual stores.

1

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There is one potential disadvantage with this roll-back method and that is that the old content of a register is read out from an extra read port and put into a roll- back stack right before it is written into. However, in the VLSI environment, extra register ports can be easily implemented without hurting performance.

In the implementation of the roll-back met...