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Browse Prior Art Database

Support Circuit for Intel 80386/82385 System With Optional Intel 80387

IP.com Disclosure Number: IPCOM000036482D
Original Publication Date: 1989-Oct-01
Included in the Prior Art Database: 2005-Jan-29
Document File: 3 page(s) / 76K

Publishing Venue

IBM

Related People

Begun, RM: AUTHOR [+3]

Abstract

This article describes a circuit arrangement for an Intel 80386/82385 microprocessor system which will function properly without an 80387 coprocessor installed and the 80386 executes an 80387 instruction.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 53% of the total text.

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Support Circuit for Intel 80386/82385 System With Optional Intel 80387

This article describes a circuit arrangement for an Intel 80386/82385 microprocessor system which will function properly without an 80387 coprocessor installed and the 80386 executes an 80387 instruction.

In a processing system which includes a 25 MHz 80386 microprocessor, an 82385 cache controller and optionally an 80387 coprocessor, the 82835 recognizes 80386 to 80387 cycles (command and data) and does not generate a ready (end of cycle) signal to the 80386 for such cycles. The 80387 coprocessor's ready signal must be "ORed" with the ready signal from the 82835 and driven to the 80386's ready input so that every 80386 cycle can be ended. However, if the optional 80387 is not installed, it cannot drive the 80386 processor's ready input and if the 80386 executes a floating point instruction and performs a bus cycle to the 80387, the 80386 will hang, waiting for ready to be activated to end the cycle.

Something is needed to drive the processor's ready input to end 80386 to 80387 cycles when the 80387 is not installed so that the system will not hang. Current software determines the presence (or absence) of the 80387 by executing floating point instructions, such as FINIT (initialize floating point processor) followed by FSTCW (store 80387 control register to memory) and then the software determines whether the stored data matches expected value. Depending on the result the software sets or clears a bit in system memory to represent whether the 80387 coprocessor is installed or not. Hence, it is required that the system not hang when such floating point instructions are executed.

One solution is to detect the presence of the 80387 without software executing floating point instructions, perhaps by monitoring the state of a pin on the 80387 socket which changes when the 80387 is installed. If such a solution was available, software could read a system status port to determine if the 80387 was installed or not. The software could then avoid executing 80387 floating point instructions and avoid the hang on the 80386 to 80387 bus cycle.

The circuit arrangement disclosed herein is shown in the drawing. It consists of control logic which provides a special ready signal (#RDY387PAL) which is only generated on processor cycles to the 80387 to ensure that such cycles are ende...