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Method for Identifying Test Patterns Which Cause Damaging Transient Currents Through Devices Under Test

IP.com Disclosure Number: IPCOM000036494D
Original Publication Date: 1989-Oct-01
Included in the Prior Art Database: 2005-Jan-29
Document File: 2 page(s) / 31K

Publishing Venue

IBM

Related People

Ferro, E: AUTHOR [+3]

Abstract

A small resistor placed in the high voltage supply (Vdd) line to a device under test can, together with the tester's high speed comparators, be used to monitor the voltage across the resistor and identify test patterns that generate high current (1-7 amperes), short time duration (1-15 nanoseconds) transients.

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Method for Identifying Test Patterns Which Cause Damaging Transient Currents Through Devices Under Test

A small resistor placed in the high voltage supply (Vdd) line to a device under test can, together with the tester's high speed comparators, be used to monitor the voltage across the resistor and identify test patterns that generate high current (1-7 amperes), short time duration (1-15 nanoseconds) transients.

A test pattern can cause simultaneous switching of circuits and a resultant high current transient which can cause damage to a device under test. Identification of a damaging test pattern by means of an oscilloscope is not possible when the pattern set is large, and sets comprised of more than a million patterns is common today.

Referring to the figure, a resistor 2 is inserted in the Vdd line to the device under test 4. Tester comparator TC1 has one input from node A and a second input from a first voltage reference VR1. Tester comparator TC2 has one input from node B and a second input from a second voltage reference VR2. Standard decoupling capacitors C1 and C2 are connected from Vdd to ground. The output from TC1 6 and the output from TC2 8 are used to accurately monitor the voltage drop across resistor 2 in both voltage and time domains. The tester then supplies the pattern number associated with the potentially damaging high current transient associated with the specific test pattern.

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