Browse Prior Art Database

Parity Generator and Parity Checker Functions Embedded in a RAM Macro

IP.com Disclosure Number: IPCOM000036591D
Original Publication Date: 1989-Oct-01
Included in the Prior Art Database: 2005-Jan-29
Document File: 3 page(s) / 48K

Publishing Venue

IBM

Related People

Akrout, C: AUTHOR [+4]

Abstract

Parity generation and parity checking are functions frequently used in processor design. An extra bit, the parity bit, is generated by byte of data in the parity generator. This parity bit is then stored in a RAM through the write operation and latter checked, when one wants to use data out of the RAM, after a read operation.

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Parity Generator and Parity Checker Functions Embedded in a RAM Macro

Parity generation and parity checking are functions frequently used in processor design. An extra bit, the parity bit, is generated by byte of data in the parity generator. This parity bit is then stored in a RAM through the write operation and latter checked, when one wants to use data out of the RAM, after a read operation.

This disclosure proposes to embed the two logical functions, parity generation and parity checking, within the RAM Macro.

a) Parity Generation: As shown in Fig. 1, which depicts the parity generation timing, the set-up time depends on the process and the environmental conditions. Presently, it is specified to the user from the best-case conditions of the ASTAP simulations. At these conditions, the RAM macro is running at the maximum speed, then leaving a short time to generate the parity bit by the user, outside the RAM.

The integration of the parity generator function within the RAM macro allows the possibility to include the worst case delay required to generate the parity bit within the maximum set-up time obtained in the same worst-case conditions.

Then, the speed improvement corresponds to the difference between the worst-case and the best-case set-up times. Note that in CMOS technology, there is a ratio of three between the best- and worst-case set-up times.

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Another advantage to including the parity generation function with the RAM is a density improvement. The benefit comes from the fact that the...