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Browse Prior Art Database

"Next Byte Zero" Method for Data Steering

IP.com Disclosure Number: IPCOM000036633D
Original Publication Date: 1989-Oct-01
Included in the Prior Art Database: 2005-Jan-29
Document File: 3 page(s) / 85K

Publishing Venue

IBM

Related People

Keener, DS: AUTHOR [+2]

Abstract

This article describes a method of steering data from a data bus into a 32-bit-wide first-in first-out (FIFO) buffer where the data bus can be either 16 or 32 bits wide and the data can start at any offset within the bus.

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"Next Byte Zero" Method for Data Steering

This article describes a method of steering data from a data bus into a 32- bit-wide first-in first-out (FIFO) buffer where the data bus can be either 16 or 32 bits wide and the data can start at any offset within the bus.

In a bus architecture which states that all memory is byte addressable, any card which accesses the bus must be able to read data from or write data to any one byte at any address. This means that not all accesses will be double word aligned. Because of this, data must be steered into the attachment card, so that data bytes are transferred to the correct place. The implementation disclosed herein is on an adapter card which contains a data FIFO buffer four bytes wide and eight bytes deep. This steering depends on the address, the amount of data desired, and the data size of the addressed slave. Present implementations of MICRO CHANNEL* controllers are not designed to handle odd lengths of data or odd aligned starting addresses efficiently. These situations do not use the full width of the data bus.

The method of implementing data steering herein will work regardless of the alignment of the address, the size of the data being fetched, or the conditions present during the previous cycle. It gets re-computed each cycle so that the data transferred is always in the correct sequence.

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In order to make this work, the concept of "Next Byte Zero" (NBZ) was devised. This means that a pointer is ke...