Browse Prior Art Database

Slow Start Circuit

IP.com Disclosure Number: IPCOM000036795D
Original Publication Date: 1989-Oct-01
Included in the Prior Art Database: 2005-Jan-29
Document File: 2 page(s) / 24K

Publishing Venue

IBM

Related People

Clemmons, E: AUTHOR [+4]

Abstract

This article describes a circuit arrangement which limits the amount of current from a source (power supply) at initial power-on into a low impedance circuit that requires an excess amount of current at initial application of power.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 76% of the total text.

Page 1 of 2

Slow Start Circuit

This article describes a circuit arrangement which limits the amount of current from a source (power supply) at initial power-on into a low impedance circuit that requires an excess amount of current at initial application of power.

Some low impedance circuits require an excess amount of current at initial application of power. The circuit disclosed herein limits the current from a power supply so as not to exceed the power supply capabilities of the power supply.

The slow-start circuit of this disclosure is shown in the drawing. A P-channel field-effect transistor (FET) Q1 is placed between the power supply voltage and the input to the low impedance circuit. A series resistor divider network R1 and R2 is placed between the input voltage and the return, with the center connection connected to the gate of FET Q1. A capacitor C1 is placed across the source to gate of FET Q1. A diode CR1 is placed across the gate of FET Q1 and return, with the cathode connected to the gate.

In operation, as the input voltage VIN is applied to the circuit, the FET Q1 blocks the flow of current to the output VOUT, since the capacitor C1 is discharged and places zero volts from source to gate of the FET. As the capacitor charges, the source-to-gate voltage is gradually increased, turning the FET Q1 on slowly. The slow FET turnon will allow the current through the FET Q1 to increase gradually and allow a gradual increase of current into the low impedance circuit, ther...