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Low-Crosstalk Controlled Impedance Board

IP.com Disclosure Number: IPCOM000036811D
Original Publication Date: 1989-Oct-01
Included in the Prior Art Database: 2005-Jan-29
Document File: 2 page(s) / 61K

Publishing Venue

IBM

Related People

Rajan, F: AUTHOR

Abstract

It is proposed to combine stripline and co-planar methods for controlled impedance boards as a means of reducing crosstalk in semiconductor devices. The proposal reduces crosstalk between signal lines by a factor of three.

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Low-Crosstalk Controlled Impedance Board

It is proposed to combine stripline and co-planar methods for controlled impedance boards as a means of reducing crosstalk in semiconductor devices. The proposal reduces crosstalk between signal lines by a factor of three.

Controlled impedance boards in single or multi-layer environments are designed using the stripline, microstrip, or co-planar methods. In the conventional stripline technique shown in Fig. 1, a controlled impedance line is obtained by having a ground plane 1 on the top and another ground plane 2 on the bottom of the conductor 3 and varying the clearance 4 between conductor 3 and ground planes 1 and 2. The

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microstrip method uses a similar technique except that the ground is on only one side of the signal for use in single-layer boards.

The stripline technique has the limitation that the signal lends itself to picking up crosstalk from its neighboring signal trace. The conductors 3 and 6 have to be kept apart to reduce the crosstalk. The increased distance 5 from conductor 3 to conductor 3 is undesirable, especially with higher frequencies and faster signal edges.

The co-planar design uses ground lines on either side of a conductor 3. The impedance is maintained by varying the clearance 7 between conductor 3 and ground line 6 which varies the capacitance induced on the conductor 3. This reduces the crosstalk, but it is desirable to reduce it even further.

A combination of the stripline and c...