Browse Prior Art Database

Standing Wires on End

IP.com Disclosure Number: IPCOM000036844D
Original Publication Date: 1989-Nov-01
Included in the Prior Art Database: 2005-Jan-29
Document File: 2 page(s) / 87K

Publishing Venue

IBM

Related People

Bartush, TA: AUTHOR

Abstract

A photolithography method is proposed to define wires in semiconductor devices so that wiring density is improved with no detriment to conductivity. The procedure uses sidewall deposition and etchback techniques to realize a composite wire on end supported by a mandrel.

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Standing Wires on End

A photolithography method is proposed to define wires in semiconductor devices so that wiring density is improved with no detriment to conductivity. The procedure uses sidewall deposition and etchback techniques to realize a composite wire on end supported by a mandrel.

Semiconductor chip density is wire limited since wiring processes, such as lift-off, cannot utilize minimum lithographic capabilities. It is proposed to use a sacrificial mandrel and sidewall techniques for reducing wiring pitch by reducing dependence on the lift- off method.

In the proposed process, a multi-layer resist (MLR) structure is deposited with an underlay of sacrificial material, such as photoresist (PR) or polyimide (PI). After being exposed and developed, a reactive ion etch (RIE) is conducted at low pressure and in O2 to produce a straight sidewall in the underlay material. A low temperature sputter process is used to coat the sidewalls of the mandrel with metal.

A thin film of sidewall material is next deposited which is a conformable coating, such as plasma nitride, plasma HMDS, or sputtered quartz. RIE is used to etch this material, leaving a sidewall on all vertical edges which protects the metal on the edges during etch. A conventional litho masking sequence is used to remove regions of unwanted sidewall metal. The sidewall material is removed by plasma etching and the PR stripped.

A metal etch is used to remove excess metal leaving only that which is prote...