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Executing CHIP SELF-TEST, Debug, Interchip Wiring TEST, RESET and INITIALIZATION Operations by Means of Microcode Sequences of on CHIP PROCESSOR INSTRUCTIONS

IP.com Disclosure Number: IPCOM000036852D
Original Publication Date: 1989-Nov-01
Included in the Prior Art Database: 2005-Jan-29
Document File: 9 page(s) / 288K

Publishing Venue

IBM

Related People

Jaber, TK: AUTHOR

Abstract

This article describes a sequence of microcode instructions of an On-Chip Processor. The On-Chip Processor (OCP) is a piece of hardware responsible for executing and mapping the microcode instructions into control signals used to perform the following functions at the chip, card and system level: Self-test (AC, DC and Array Self-Test) Interchip wiring test Reset of chip scan strings Array initialization with 0 Array initialization with random data Read and write scan strings Read and write embedded arrays

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Executing CHIP SELF-TEST, Debug, Interchip Wiring TEST, RESET and INITIALIZATION Operations by Means of Microcode Sequences of on CHIP PROCESSOR INSTRUCTIONS

This article describes a sequence of microcode instructions of an On-Chip Processor. The On-Chip Processor (OCP) is a piece of hardware responsible for executing and mapping the microcode instructions into control signals used to perform the following functions at the chip, card and system level: Self-test (AC, DC and Array Self-Test) Interchip wiring test

Reset of chip scan strings

Array initialization with 0

Array initialization with random data

Read and write scan strings

Read and write embedded arrays

Consider a chip with a processor residing on the chip itself. The processor receives microcode instructions from a ROS or a RAM serially via a bus.

The processor receives data via a SERIAL IN pin according to a predefined protocol. The data is decoded as instructions, and a sequence of instructions (microcode) would achieve one of the following operations:
SELF-TEST (AC, DC AND ARRAY SELF-TEST) Interchip wiring test

Reset of chip scan strings

Array initialization with 0

Array initialization with random data

Read and write scan strings

Read and write embedded arrays

LIST OF ON-CHIP PROCESSOR INSTRUCTIONS

An OCP instruction is a string of 16 bits of data.

(Image Omitted)

The 8 address bits allow up to 255 unique addresses. An OCP on a chip is recognized by an individual unique address and a broadcast address of 00 HEX. An instruction with an address not matching the unique individual address or the broadcast address of a certain OCP, does not get executed by that OCP. Only an OCP with a matching address will execute that instruction. INSTRUCTION HEX CODE 1 LOAD SCNTR..........xx12
2 LOAD LSS............xx13
3 LOAD BSS............xx14
4 LOAD OCPSS..........xx16
5 EN DCLST............xx17
6 DIS DCLST...........xx77
7 EN ACLST............xx15

1

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8 DIS ACLST...........xx75
9 EN AST..............xx18
10 DIS AST.............xx78
11 EN AI...............xx19
12 DIS AI..............xx79
13 RESUME..............xx21
14 EN RUN N............xx22
15 DIS RUN N...........xx20
16 HALT................xx31
17 EN FREEZE...........xx23
18 DIS FREEZE..........xx24
19 EN INBND............xx44

Continued: 20 DIS INBND...........xx47 21 EN OUTBND...........xx45 22 DIS
OUTBND..........xx49 23 EN WBCK.............xx5C 24 DIS WBCK............xx52 25
EN SO OCD...........xx5D 26 DIS SO OCD..........xx55 27 EN OCD..............xx5E
28 DIS OCD.............xx56 29 EN OCD OVRD.........xx27 30 DIS OCD
OVRD........xx28 31 EN CKSTP............xx25 32 DIS CKSTP...........xx26 33 EN
ATM..............xx61 34 DIS ATM.............xx62 35 EN ARNW.............xx63 36 DIS
ARNW............xx64 37 EN DEQA.............xx65 38 DIS DEQA............xx66 39 RT
STATUS...........xx60 40 EN CEC CLKS.........xx10 41 DIS CEC CLKS........xx11

DESCRIPTION OF INSTRUCTION EXECUTION: The following sequence of instructions is used to perform the arrays...