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Bipolar Complementary Metal Oxide Silicon Circuit to Replace PNP Emitter Follower

IP.com Disclosure Number: IPCOM000036965D
Original Publication Date: 1989-Nov-01
Included in the Prior Art Database: 2005-Jan-29
Document File: 2 page(s) / 61K

Publishing Venue

IBM

Related People

Kemerer, DW: AUTHOR

Abstract

A bipolar complementary metal oxide silicon (BICMOS) circuit uses CMOS and NPN devices in place of a PNP device to achieve faster performance and reduce process complexity.

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Bipolar Complementary Metal Oxide Silicon Circuit to Replace PNP Emitter Follower

A bipolar complementary metal oxide silicon (BICMOS) circuit uses CMOS and NPN devices in place of a PNP device to achieve faster performance and reduce process complexity.

It is desireable to use full complementary devices, i.e., N channel and P channel field-effect transistors (FETs) as well as NPN and PNP bipolar devices, in the design of logic circuits such as the one shown in Fig. 1. However, it is extremely difficult and expensive to fabricate a PNP transistor with as high performance as an NPN transistor.

The BICMOS circuit which replaces the PNP emitter follower, transistor T2, of Fig. 1 is shown in Fig. 2. The circuit consists of a P channel FET T4 used as a source follower. High performance is achieved by feeding the drain current of transistor T4 into the base of NPN transistor T6. Collector current of transistor T6 multiplies the base current by the amplification, Beta, of transistor T6. N channel FET T8 is required to turn off transistor T6.

Conventional layouts of a PFET, as shown in Fig. 3, and an NPN transistor, as shown in Fig. 4, may be merged into the space saving layout shown in Fig. 5. Referring to Fig. 3, elements of the PFET layout are N well 12, N well contact 14, gate conductor 22, and P doped region 16 within which source contact 18 and drain contact 20 are located. The conventional layout of an NPN shown in Fig. 4 is comprised of collector contact 24 in N...