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Improved Current Mirror for Low Beta Transistors

IP.com Disclosure Number: IPCOM000037032D
Original Publication Date: 1989-Nov-01
Included in the Prior Art Database: 2005-Jan-29
Document File: 2 page(s) / 34K

Publishing Venue

IBM

Related People

Gruver, MR: AUTHOR [+2]

Abstract

This current mirror allows very long strings to be built with a large degree of accuracy, even with low-Beta devices. The figure below shows the circuit for a PNP configuration. Transistors Q1, Q2, and Qn represent current sources, which are a mirror of the reference current IREF.

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Improved Current Mirror for Low Beta Transistors

This current mirror allows very long strings to be built with a large degree of accuracy, even with low-Beta devices. The figure below shows the circuit for a PNP configuration. Transistors Q1, Q2, and Qn represent current sources, which are a mirror of the reference current IREF.

As the number of mirror transistors increases, so does the emitter current load of Q1A and Q2A shown in the figure. This is due to the base current contribution of each of the mirrored transistors. As the emitter currents of Q1A and Q2A increase, so do their corresponding bases currents into Node 1. This current creates an error in the mirror, since it subtracts from the collector of device Q0. To compensate for this error, device Q4A senses the current from Q1A. Q1A's base current is then mirrored, multiplied by two, and fed back to Node 1. This is accomplished by NPN current mirror Q5A and Q6A. R1 and R2 are ratioed to give an X2 multiple. This effectively cancels all error currents at Node 1XS making the mirror independent of the number N. Q3A adds additional accuracy, since the collector current of Q1A, sensed by Q4A, is actually in error by the amount of base current in Q1A. Q3A adds additional current to make up for that loss.

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