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Simple and High Performance Support for IEEE Floating Point Exceptions

IP.com Disclosure Number: IPCOM000037033D
Original Publication Date: 1989-Nov-01
Included in the Prior Art Database: 2005-Jan-29
Document File: 1 page(s) / 12K

Publishing Venue

IBM

Related People

Groves, RD: AUTHOR

Abstract

High-speed support for IEEE floating point exceptions in a highly overlapped machine require careful trade-offs between software and hardware. Because the IEEE standard trap mode requires precise interrupts, the synchronization and/or hardware complexity implied either significantly increases design complexity and/or adversely affects system floating point performance. As an alternative for this class of machines, a set of retrospective diagnostics and floating point modes to provide the most useful aspects of the IEEE trap modes has been proposed. While many other machines are implementing this alternative, they all still support some form of high speed precise interrupt. What is described here is a combination of hardware and software without requiring the high-speed precise interrupt.

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Simple and High Performance Support for IEEE Floating Point Exceptions

High-speed support for IEEE floating point exceptions in a highly overlapped machine require careful trade-offs between software and hardware. Because the IEEE standard trap mode requires precise interrupts, the synchronization and/or hardware complexity implied either significantly increases design complexity and/or adversely affects system floating point performance. As an alternative for this class of machines, a set of retrospective diagnostics and floating point modes to provide the most useful aspects of the IEEE trap modes has been proposed. While many other machines are implementing this alternative, they all still support some form of high speed precise interrupt. What is described here is a combination of hardware and software without requiring the high-speed precise interrupt.

For retrospective diagnostics and logging of exceptions, a summary exception bit is provided in the floating point unit which can easily be examined by turning on a special bit in any floating point instruction. This bit is defined in such a way as to allow implementing retrospective diagnostics and logging by merely turning on this bit for the last floating point instruction in a procedure and performing a conditional branch and link to a logging routine based on the summary bit. The logging routine logs the exception(s) and the call chain and then turns off the summary bit. The procedure guarantees that the first occurrence of each type of exception is logged at least at the subrout...