Browse Prior Art Database

Off-Chip Electrostatic Discharge Protection

IP.com Disclosure Number: IPCOM000037081D
Original Publication Date: 1989-Nov-01
Included in the Prior Art Database: 2005-Jan-29
Document File: 2 page(s) / 37K

Publishing Venue

IBM

Related People

Colt, J: AUTHOR

Abstract

When silicon integrated circuit chips are mounted on a silicon wiring substrate, electrostic protective devices, e.g., diodes and resistors, are incorporated in the wiring substrate instead of in the integrated circuit chip. Thus, protective devices can be optimized for superior electrostic discharge (ESD) protection and space is saved on the integrated circuit chip.

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Off-Chip Electrostatic Discharge Protection

When silicon integrated circuit chips are mounted on a silicon wiring substrate, electrostic protective devices, e.g., diodes and resistors, are incorporated in the wiring substrate instead of in the integrated circuit chip. Thus, protective devices can be optimized for superior electrostic discharge (ESD) protection and space is saved on the integrated circuit chip.

Referring to the figure, integrated circuit chip 2 is attached to silicon wiring substrate 4 by means of reflowed solder bond 6. Protective device 8, shown simply as a diffusion, is connected by wiring 10 over insulating layer 16 to solder joint 6 and by wiring 12 over insulating layer 16 to input/output pad 14.

Since space is more available on the wiring substrate, larger ESD protection devices may be designed. Also, ESD protective device characteristics are easier to optimize when processing is not limited by sensitivity of very large-scale integrated circuit devices.

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