Browse Prior Art Database

Clock Checker

IP.com Disclosure Number: IPCOM000037154D
Original Publication Date: 1989-Nov-01
Included in the Prior Art Database: 2005-Jan-29
Document File: 2 page(s) / 43K

Publishing Venue

IBM

Related People

Mueller, KD: AUTHOR [+4]

Abstract

An installed clock checker has to be monitored, as the adverse effects produced by non-functioning and non-existing checkers are identical. A defective clock checker, for example, may lead to the conclusion that errors, if any, have been detected, although in actual fact there has been no error check at all.

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Clock Checker

An installed clock checker has to be monitored, as the adverse effects produced by non-functioning and non-existing checkers are identical. A defective clock checker, for example, may lead to the conclusion that errors, if any, have been detected, although in actual fact there has been no error check at all.

Activating the clock checker directly from the outside is often not possible, as the number of inputs/outputs is limited, and checkers are only activatable through tester inputs but not during normal system operation.

The circuit illustrated in the figure permits selectively monitoring each path of the checker. A path to be monitored is selected by the unit shift interface (USI) of a service processor or in response to a microinstruction on a clock control bus.

The individual paths of the checker may be monitored in the normal system environment, without removing the module from the card and without using external hardware or a specific test system.

For forcing one of the 14 clock checks, the chip illustrated in the figure comprises fifteen additional latches (one more than the number of checks to be performed). Each possible clock check is asso ciated with one latch. In addition, there is one latch for the standby position (no forced check).

The latches are initialized with the binary pattern '100000000000000'. In response to a force clock check command issued via the USI or the clock control bus, a clock check on the first line is forced, shif...