Browse Prior Art Database

Multiple Active Page Memory

IP.com Disclosure Number: IPCOM000037213D
Original Publication Date: 1989-Nov-01
Included in the Prior Art Database: 2005-Jan-29
Document File: 2 page(s) / 38K

Publishing Venue

IBM

Related People

Katayama, Y: AUTHOR [+6]

Abstract

Disclosed is a memory device structure that emphasizes its page mode operation. Memory cells are divided into some ISLANDs (or blocks), and each island, comprised of the sense amplifiers and wordlines, is controlled by its own exclusive controller. When the chip is in stand-by state, all the sense amplifiers are activated (not precharged) and act as buffers.

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Multiple Active Page Memory

Disclosed is a memory device structure that emphasizes its page mode operation. Memory cells are divided into some ISLANDs (or blocks), and each island, comprised of the sense amplifiers and wordlines, is controlled by its own exclusive controller. When the chip is in stand-by state, all the sense amplifiers are activated (not precharged) and act as buffers.

Functions of this memory are the following: * Sense amplifiers are normally active and act as page buffers. * Contents of the data buffers (sense amplifiers) are changed when the page is "MISS". This action is taken independently from other islands. The figure shows the structure of the memory device. Example:

If the accessed page is in Island #1, and the sense amplifier of Island #1 does not have the page, then the sense amplifiers are precharged and get the required page. In this time-frame, sense amplifiers of other islands are kept in "active" state.

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