Browse Prior Art Database

Etching Dielectric Materials for Copper Interconnects

IP.com Disclosure Number: IPCOM000037236D
Original Publication Date: 1989-Dec-01
Included in the Prior Art Database: 2005-Jan-29
Document File: 2 page(s) / 53K

Publishing Venue

IBM

Related People

Hu, CK: AUTHOR [+3]

Abstract

A technique is described whereby a materials set and process is implemented for copper interconnects in VLSI circuits so as to eliminate Cu oxidation when building two or more levels.

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Etching Dielectric Materials for Copper Interconnects

A technique is described whereby a materials set and process is implemented for copper interconnects in VLSI circuits so as to eliminate Cu oxidation when building two or more levels.

The use of copper interconnects for VLSI is considered to have several advantages over aluminum alloy metallizations. However, copper lines or studs will become oxidized, when building two or more levels, if the copper is exposed to an oxygen-based plasma, such as that used in etching the dielectric material, or in resist stripping. The copper oxide has a deteriorating effect on the conductivity of the copper interconnects. The concept described herein provides a process to eliminate in-process copper oxidization. The figure shows the necessary steps used in the implementation of this process.

A thin layer of etch stop, such as silicon nitride, is used for the insulator etch SiO2 polymers. This etch stop acts as a protective layer for the copper during the resist stripping or dielectric RIE operation. A 100 nm silicon nitride layer is deposited on top of the polymer prior to patterning for use as a durable mask during oxygen plasma etching of polymer dielectrics.

The thin etch stop is removed by means of dry etching, such as RIE, or ion milling. Because Si3N4 has a higher dielectric constant than either SiO2 or polymers, it may be undesirable from a performance consideration. However, it has other useful functions in this structu...