Browse Prior Art Database

Method for Spin Loop Detection

IP.com Disclosure Number: IPCOM000037247D
Original Publication Date: 1989-Dec-01
Included in the Prior Art Database: 2005-Jan-29
Document File: 5 page(s) / 69K

Publishing Venue

IBM

Related People

Bowen, NS: AUTHOR [+2]

Abstract

Multiprocessing/processor systems that share memory locations provide atomic memory update instructions. An example is the Compare and Swap (CS) instruction on the IBM System/370. This instruction allows one to atomically Compare a memory word against a register and, if successful, to Swap another register into the memory location. The use of these instructions often have an execution path that retries the instructions until the compare succeeds. This retry path is often referred to as a spin loop. These loops can cause the processor to wait (while executing instructions) for some set of conditions to be met. This can degrade the overall performance of the system. (Image Omitted). There are two primary areas for which the CS is used: 1. Process Serialization.

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Method for Spin Loop Detection

Multiprocessing/processor systems that share memory locations provide atomic memory update instructions. An example is the Compare and Swap (CS) instruction on the IBM System/370. This instruction allows one to atomically Compare a memory word against a register and, if successful, to Swap another register into the memory location. The use of these instructions often have an execution path that retries the instructions until the compare succeeds. This retry path is often referred to as a spin loop. These loops can cause the processor to wait (while executing instructions) for some set of conditions to be met. This can degrade the overall performance of the system.

(Image Omitted)

. There are two primary areas for which the CS is used: 1. Process Serialization.

Multiprocessor systems often use spin latches to perform process serialization. These are implemented CS instructions against predetermined words in memory. The operating system generally uses these latches for high priority, must complete functions. The delays caused by this technique are often hard to measure and because of their high priority they often cannot be traced. To prevent suffering a context switch while holding a latch and causing other tasks to spin for excessive amounts of time, the operating system obtains these latches while disabled. It is generally not feasible for the operating system to monitor its spin latch activity since the nature of the spin latch implies that a time critical operation is in progress.

In addition, these instructions are available to any problem state program for functions that may not be critical (from an operating system perspective). A problem state program in a spin would simply appear as a CPU bound job. The operating system would have absolutely no way of detecting a problem state program in a spin loop. As the machine implementation exploits more processors (the largest current IBM 3090 contains 6 processors), spin loops may become more significant, particularly in numerically intensive computations that use multiple processors to solve a single problem.

2. Concurrent Access: CS is used for areas that involve shared memory locations that are updated by multiple processes without the use of any process serialization. A classic example would be the incrementing of a shared counter. A LOAD,ADD,STORE sequence would not work because the counter (i.e., the same value) can be LOADed by multiple tasks concurrently and thus the same value (after the ADD) can be written each of the tasks. CS is also used for much more complex uses such as concurrent queue updating. The concurrent access code has a retry path that can also causes a temporary spin loop.

The CS instruction is required on these systems, but its presence presents some problems. The operating system can be delayed in performing its disabled process serialization. Since the CS is a nonprivileged instruction application tasks also have the abilit...