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Redundant Clock Chopper With Clock-Chopper Inhibit

IP.com Disclosure Number: IPCOM000037262D
Original Publication Date: 1989-Dec-01
Included in the Prior Art Database: 2005-Jan-29
Document File: 2 page(s) / 33K

Publishing Venue

IBM

Related People

Budell, TW: AUTHOR

Abstract

This article proposes adding a clock-chopper inhibit (CCI) function to a standard redundant clock chopper. When CCI is low, the standard chopper will operate normally, when CCI is high, clock chopping will be inhibited and the output of the clock chopper will follow that of the input clock signal (CLK) directly.

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Redundant Clock Chopper With Clock-Chopper Inhibit

This article proposes adding a clock-chopper inhibit (CCI) function to a standard redundant clock chopper. When CCI is low, the standard chopper will operate normally, when CCI is high, clock chopping will be inhibited and the output of the clock chopper will follow that of the input clock signal (CLK) directly.

A NOR-gate implementation of a commonly used clock chopper is given in Fig. 1. Its output pulse width is exactly determined by the time-delay element, t, regardless of the pulse width of CLK. The time-delay element may be composed of any circuitry that produces a desired time delay. The only requirement on CLK is that its cycle time must be greater than 2t.

The clock chopper of Fig. 1 has an inherent immunity to clock- not-chopped faults, and no single defect can cause it to function in a clock-not-chopped mode. It either functions normally despite the defect or its output locks up. It may be fully tested in a DC environment.

Fig. 2 shows a NOR-gate implementation of a redundant clock chopper which incorporates the proposed CCI function. It differs from that of Fig. 1 in that the time-delay signal and the primary feedback signal are both gated by the CCI input. The time-delay signal is gated by NOR2 and the primary feedback signal gated by NOR1. Since both

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gates are inverting types, the time-delay element and output stage are both made non-inverting. Given a positive input clock signal, th...