Browse Prior Art Database

Method for Manufacturing a Low-Cost Power Regulator Card

IP.com Disclosure Number: IPCOM000037287D
Original Publication Date: 1989-Dec-01
Included in the Prior Art Database: 2005-Jan-29
Document File: 2 page(s) / 60K

Publishing Venue

IBM

Related People

Ameen, JG: AUTHOR [+4]

Abstract

Disclosed is low-cost process for the manufacture of a power regulator card using a minimum of card real estate.

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Method for Manufacturing a Low-Cost Power Regulator Card

Disclosed is low-cost process for the manufacture of a power regulator card using a minimum of card real estate.

Normally, a power regulator card uses two chips which are backbonded next to each other on a card and then are interconnected by means of wirebonding. One of these chips supplies a constant voltage based upon inputs from the other, a control chip. Although this works, the noise generated from the wires joining the two chips limits the frequency at which the card operates. To cost reduce this device, save real estate on the card, and improve the electrical performance of the card, the following processes are proposed:

1) Using well known IBM chip technology, evaporate Sn/Pb solder onto the sites of each chip requiring interconnection.

2) Design a lead frame to connect the common I/Os on both chips (see Fig.
1).

3) Control collapse chip connection (C-4) join the chips (one on the top side and the other on the bottom side of the lead frame, as in Fig. 2) such that the chips are stacked with their active sides facing one another.

4) Form the leads so as to provide a strain relief and also to assist in positioning the chip assembly for the vapor phase soldering of the discrete components. When the leads are bonded to the card with a thermode, the back of the card side chip is fully in contact (with slight compression) to a solderable pad that lies under the chip. The card side of the power chip is met...