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Browse Prior Art Database

TAB Cross-Point Structure for Burn-In

IP.com Disclosure Number: IPCOM000037289D
Original Publication Date: 1989-Dec-01
Included in the Prior Art Database: 2005-Jan-29
Document File: 2 page(s) / 60K

Publishing Venue

IBM

Related People

Katyl, RH: AUTHOR

Abstract

Burn-in of chips on TAB (Tape Automated Bonding) tape requires the connection of many signals from a test setup to each chip. Running the signals on parallel bus wiring right on the tape from a common contacting position has the advantage of simpler fixturing. This article describes a method of making the chip-bus connections using two-level metal TAB tape.

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TAB Cross-Point Structure for Burn-In

Burn-in of chips on TAB (Tape Automated Bonding) tape requires the connection of many signals from a test setup to each chip. Running the signals on parallel bus wiring right on the tape from a common contacting position has the advantage of simpler fixturing. This article describes a method of making the chip-bus connections using two-level metal TAB tape.

For the purposes of burn-in, a via-like structure can be selectively created by an array of cross-points as shown in the figure. Wiring on the signal level crosses over a polyimide window. Bus wiring is located on the power plane wiring level underneath. These wires are physically separated by the thickness of the polyimide; no connection is formed unless they are pressed together.

After test of the encapsulated chip on the tape, a thermode located on the tester joins the crossed leads together with a thermo-compression bond. The bonding is done only on the good chips, so that any defective chips are kept off of the parallel bus. For burn-in, a number of chips are bussed together, the bus being brought out to a contacting area where connection is made to the tester/exerciser.

This approach allows a selective via-like structure to be obtained without any change to the tape fabrication process. A thermode is needed at tester, but additional tooling is needed for any other burn- in scheme. Selective TC bonding of good chips keeps bad parts off the bus, improving test yield. H...