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Performance Optimized Addressing Modes in an Application Specific Digital Signal Processor

IP.com Disclosure Number: IPCOM000037315D
Original Publication Date: 1989-Dec-01
Included in the Prior Art Database: 2005-Jan-29
Document File: 4 page(s) / 19K

Publishing Venue

IBM

Related People

Boudreaux, RP: AUTHOR [+4]

Abstract

This article describes storage addressing techniques for an application specific digital signal processor (DSP) of the type for use in a computerized branch exchange (CBX) T1/9005 card.

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Performance Optimized Addressing Modes in an Application Specific Digital Signal Processor

This article describes storage addressing techniques for an application specific digital signal processor (DSP) of the type for use in a computerized branch exchange (CBX) T1/9005 card.

A DSP is frequently used in applications where performance is very critical. An example of such an application is in processing voice and data samples. In the case of the T1/9005 card, 24 voice or data samples are received from a CBX time division multiplexed (TDM) bus during every 125-microsecond frame. During each 125-microsecond period, these samples must be evaluated and processed and then put out to the corresponding 24 channels of a T1 communications line. Meanwhile, 24 voice or data samples are received from the T1 line and must be processed and placed on the TDM bus during each 125- microsecond frame. Thus, during every 125-microsecond period, for each of 24 channels, two voice or data samples must be put in, evaluated, processed, and put out. This type of operation is ideal for a DSP.

In the above example, it is very important that the DSP be capable of completing the required processing within the 125-microsecond period. For example, if a DSP has an instruction execution time of 125 nanoseconds, then the above mentioned processing of 48 voice or data samples would have to be completed within 1000 instructions. If the processing does not complete on time, some voice or data samples may be lost, thus corrupting the voice or data transmission. In order to be able to complete the function within the required time, it is important to have efficient and powerful instructions.

The tendency is to use traditional general-purpose indexing modes when designing a DSP. However, when the DSP is to be used for a specific class of applications, greater efficiency and performance can be achieved by customizing the addressing modes to the particular class of applications, in addition to providing some general-purpose addressing modes.

As part of the DSP processing, various RAM resident tables are typically used. Frequently indexed addressing is required. This is especially true with channel-oriented processing where certain tables contain an entry for each channel. In order to access an element of a RAM table, the complete address must be specified. In a typical case, this may consist of the sum of the base address of the table and an index value into the table. A traditional approach would be to add the base address to the index value, store the result in an index register, and then use the index register to address the appropriate table element. In this case, one instruction field would be required to specify the index register. The time required to calculate the address and load the index register, however, would hinder performance, especially in realtime critical applications.

An alternate approach would be to use double register indexing. In this case, one index...