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Reduced Microcode Overhead Using a Subroutine Table Architecture in a Channel Oriented Digital Signal Processor

IP.com Disclosure Number: IPCOM000037351D
Original Publication Date: 1989-Dec-01
Included in the Prior Art Database: 2005-Jan-29
Document File: 4 page(s) / 59K

Publishing Venue

IBM

Related People

Oliver, JK: AUTHOR

Abstract

This article describes a technique which uses a subroutine table architecture in a channel-oriented digital signal processor (DSP) to reduce the microcode overhead in determining what processing to perform for each channel and in looping through the channels.

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Reduced Microcode Overhead Using a Subroutine Table Architecture in a Channel Oriented Digital Signal Processor

This article describes a technique which uses a subroutine table architecture in a channel-oriented digital signal processor (DSP) to reduce the microcode overhead in determining what processing to perform for each channel and in looping through the channels.

Digital signal processors are frequently used in applications where performance is very critical; a number of these applications are channel-oriented applications. An example of such an application would be in processing voice or data channels. In the case of a T1 card, 24 voice or data samples are received from a computerized branch exchange (CBX) time division multiplexed (TDM) bus during each 125-microsecond period, referred to as a frame. During each frame, these samples must be evaluated and processed and then output to the corresponding 24 channels of a T1 communications line. In addition, 24 voice or data samples are received from the T1 line and must be processed and placed on the TDM bus during the same frame. Thus, during every 125-micro- second period, for each of 24 channels, two voice or data samples must be input, evaluated, processed, and output. This type of operation is ideal for a digital signal processor.

In the above example, it is important that the DSP be capable of completing the required processing within the 125-microsecond period. For example, if a DSP has an instruction execution time of 125-microseconds, then the above- mentioned processing of 48 voice or data samples would have to be completed within 1000 instructions. If the processing does not complete on time, some voice or data samples may be lost, thus corrupting the voice or data transmission. In order to be able to complete the function within the required time, it is important that the microcode overhead be low.

A traditional method of processing these channels can include a control loop which processes the channels sequentially by invoking a processing routine 24 times. For each channel, the processing routine would first have to determine what type of mode the channel was currently configured for. In the case of the T1 card, these modes would include idle modes, voice modes, data modes, loopback modes, and diagnostic modes. After determining the type of mode (data, for example), the processing routine would have to determine which specific mode the channel was in (e.g., 64 Kbps data, 56 Kbps data, subrate synchronous data, subrate asynchronous data).

Depending on the channel mode, there may be several states involved in the processing. If so, the processing routine would then have to determine which state should be next in the processing cycle. In the case of the T1 card, since the channels are bidirectional and require independent processing in both the transmit and receive directions, there are transmit states and receive states. During each control loop, processing has to be...