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Fault Isolation Scheme for an Arithmetic Unit

IP.com Disclosure Number: IPCOM000037360D
Original Publication Date: 1989-Dec-01
Included in the Prior Art Database: 2005-Jan-29
Document File: 2 page(s) / 43K

Publishing Venue

IBM

Related People

Friedberg, DH: AUTHOR [+2]

Abstract

When a hardware error is discovered in a data processing system, it is the goal of any fault isolation scheme to determine where in the hardware the defect causing the error is located. Ideally, the scheme should isolate the error to the smallest replaceable part so that the error can be corrected quickly. For large systems, isolation schemes attempt to isolate any error to an individual chip or small group of chips on a module. Normally, the error checkers are adequate to isolate the error to an acceptable number of chips. For an arithmetic unit (in particular, multipliers and dividers), however, this type of isolation is very difficult without incurring the penalty of large amounts of extra circuitry.

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Fault Isolation Scheme for an Arithmetic Unit

When a hardware error is discovered in a data processing system, it is the goal of any fault isolation scheme to determine where in the hardware the defect causing the error is located. Ideally, the scheme should isolate the error to the smallest replaceable part so that the error can be corrected quickly. For large systems, isolation schemes attempt to isolate any error to an individual chip or small group of chips on a module. Normally, the error checkers are adequate to isolate the error to an acceptable number of chips. For an arithmetic unit (in particular, multipliers and dividers), however, this type of isolation is very difficult without incurring the penalty of large amounts of extra circuitry. This invention provides a method by which errors in an arithmetic unit can be isolated with the required precision with little additional hardware.

The method uses both hardware and software elements to increase the isolation. The hardware element is an array chip which is added to the module to collect data. Most of the chips on the module calculate a modulo-3 residue on the data contained in the registers on that chip and send it to the array chip to be stored on each cycle. There is an address register for these write operations which increments by 1 each time data is written to the array. There is also a register to contain the outputs of the array, and address register for reading the array, a register to control the read gate, and a couple of control registers. All of these registers are hooked into a scan in/scan out, and the data in the array is designed to be scanned out using this ring.

Two software...