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Double High Dielectric Capacitor

IP.com Disclosure Number: IPCOM000037539D
Original Publication Date: 1989-Mar-01
Included in the Prior Art Database: 2005-Jan-29
Document File: 1 page(s) / 12K

Publishing Venue

IBM

Related People

Leas, JM: AUTHOR

Abstract

A microelectronic capacitor fabrication process is shown which produces low defect density and high dielectric constant capacitors.

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Double High Dielectric Capacitor

A microelectronic capacitor fabrication process is shown which produces low defect density and high dielectric constant capacitors.

By using a double or triple layer dielectric of silicon dioxide, silicon nitride and silicon oxynitride, defects in the dielectric films will not cause leakage between a capacitor's electrodes unless the defects happen to line up with each other. However, with high dielectric-constant capacitors such as those made of titanium dioxide or tantalum pentoxide, the use of silicon dioxide or silicon nitride as a second film results in the formation of two capacitors in series. Because the capacitance of two capacitors in series is always less than that of the smallest capacitor, a serious degredation of device capacitance results.

By using two high dielectric constant materials in the formation of a capacitor, defect propagation is prevented without degrading device capacitance. The following process sequence results in a low defect density high dielectric constant capacitor: 1) Open the wafer area to the underlying silicon of the site to be utilized to form a capacitor. 2) Deposit titanium dioxide and tantalum pentoxide layers (sequence optional) so that each layer is between 20 and 500 angstroms thick. 3) Anneal the wafer to convert the dielectric materials to the high dielectric constant crystalline phase. 4) Deposit the top electrode. Titanium metal may be deposited between steps 1 and 2 or between step...