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Defining Locating Studs Through Nontransmissive Films

IP.com Disclosure Number: IPCOM000037854D
Original Publication Date: 1989-Jul-01
Included in the Prior Art Database: 2005-Jan-30
Document File: 1 page(s) / 11K

Publishing Venue

IBM

Related People

Cote, WJ: AUTHOR [+6]

Abstract

For chip fabrication using tungsten studs as interlevel via material and silicon nitride/silicon dioxide as dielectric on a planarized substrate, an etchback process followed by deposition of a nontransmissive film produces contrasting stud edges for overlay alignment.

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Defining Locating Studs Through Nontransmissive Films

For chip fabrication using tungsten studs as interlevel via material and silicon nitride/silicon dioxide as dielectric on a planarized substrate, an etchback process followed by deposition of a nontransmissive film produces contrasting stud edges for overlay alignment.

Referring to the figure, planarized substrate 1 having tungsten studs 2 and fully planarized field dielectric 3, such as silicon nitride or silicon dioxide or combination, is subjected to reactive ion etching with trifluoromethane and carbon dioxide at 40 mTorr. total pressure to remove about 100 nm. of dielectric. At 500 watts with power density of 0.37 w/cm.2, field dielectric is removed at a rate of approximately 40 nm./min. Etching is highly selective with no discernible removal of the tungsten. Thereafter, a thin layer 4 of titanium nitride and a thicker layer 5 of aluminum (2wt.%Cu) are deposited. The underlying topography is translated to the metal surface as indicated at 6 and remains continuous, even over tightly spaced topography.

It is to be noted that excessive removal of field dielectric, i.e., 300 nm. may result in nearly discontinuous metal film at the stud edges.

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