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Browse Prior Art Database

Fine Tolerance Capacitor Assembly

IP.com Disclosure Number: IPCOM000037871D
Original Publication Date: 1989-Aug-01
Included in the Prior Art Database: 2005-Jan-30
Document File: 1 page(s) / 11K

Publishing Venue

IBM

Related People

Burlingame, GE: AUTHOR [+3]

Abstract

Disclosed is a process for controlling low frequency DC voltage tolerance within + 5%.

This text was extracted from a PDF file.
This is the abbreviated version, containing approximately 100% of the total text.

Page 1 of 1

Fine Tolerance Capacitor Assembly

Disclosed is a process for controlling low frequency DC voltage tolerance within + 5%.

As shown in FIG. 1, the DC voltage tolerance requirement of + 5% is effectively controlled by directly soldering five 11,000 microfarad capacitors 1 to a printed circuit card segment 2 containing four 2 oz. internal power planes (see FIG. 2) separated by .004". This capacitor card is plugged into a board assembly 3 using three connectors 4 in parallel that control the effective inductance of the five capacitor, 55,000 microfarad, capacitor pack to 4.5 nanohenrys and the resistance to less than 3.5 milliohms. The entire assembly is housed, supported, and retained by a molded plastic retainer 5 that utilizes existing features of the board assembly design to polarize and snap in the complete assembly.

Disclosed anonymously.

1