Browse Prior Art Database

Chip Burn-In Board

IP.com Disclosure Number: IPCOM000037943D
Original Publication Date: 1989-Sep-01
Included in the Prior Art Database: 2005-Jan-31
Document File: 1 page(s) / 11K

Publishing Venue

IBM

Related People

Noth, RW: AUTHOR [+2]

Abstract

Semiconductor chips are mounted in reusable pressure contact sockets which can be installed in standard printed circuit boards used for multiple chip burn-in testing. Only those chips passing the burn-in test are processed through final packaging. Thus, packaging costs of chips failing the burn-in test are saved.

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Chip Burn-In Board

Semiconductor chips are mounted in reusable pressure contact sockets which can be installed in standard printed circuit boards used for multiple chip burn-in testing. Only those chips passing the burn-in test are processed through final packaging. Thus, packaging costs of chips failing the burn-in test are saved.

Any of several leadless chip socket types may be adapted to accept and make pressure contact to pads of diced chips. One such socket, which also has pin connectors suitable for installation in a standard printed circuit burn-in board, is described in U. S. Patent 3,904,262 by J. M. Cutchaw, issued Sept. 9, 1975.

When the chips are mounted in the leadless chip sockets and installed in a printed circuit board, they are placed in an oven and tested for failure following application of burn-in thermal and electrical test conditions. Chips are readily removed from the reusable socket. Those chips passing the test are processed through final packaging while chips failing the test are discarded. Thus, usual packaging cost of failed chips is saved.

Disclosed anonymously.

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