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Overlapping Checkpoint - Synchronization for Pipelined Processors

IP.com Disclosure Number: IPCOM000037983D
Original Publication Date: 1989-Sep-01
Included in the Prior Art Database: 2005-Jan-31
Document File: 1 page(s) / 11K

Publishing Venue

IBM

Related People

Huang, K: AUTHOR [+2]

Abstract

SCP requires the completion of all previous storage operation when a checkpoint-synchronization instruction is being executed. It is intended primarily for storage error isolation. The mechanism described below allows an instruction processing unit (IPU) to execute IPU microwords while waiting for previous storage operations to complete during the execution of a checkpoint synchronization instruction.

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Overlapping Checkpoint - Synchronization for Pipelined Processors

SCP requires the completion of all previous storage operation when a checkpoint-synchronization instruction is being executed. It is intended primarily for storage error isolation. The mechanism described below allows an instruction processing unit (IPU) to execute IPU microwords while waiting for previous storage operations to complete during the execution of a checkpoint synchronization instruction.

When a checkpoint-synchronization instruction is being executed, IPU will signal the L1-Cache-Control to complete all the previous storage operations. The L1-Controls will immediately release the IPU, and attempt to flush all L1 store-queue entries and complete the inpage of all the 64-byte cache-page. The IPU will then proceed to execute the next sequential non- storage operations while the L1-Cache-Control is busy in data transfer operations. Upon the completion of all previous storage operations, a completion latch is set and IPU is signalled to proceed to the execution of storage operations.

If an error is detected in the system, the error can be isolated to the previous instruction or current instruction for both IPU and storage errors which include uncorrectable memory error.

Disclosed anonymously.

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