Browse Prior Art Database

Nitride Encapsulated Spacer

IP.com Disclosure Number: IPCOM000038176D
Original Publication Date: 1989-Dec-01
Included in the Prior Art Database: 2005-Jan-31
Document File: 1 page(s) / 11K

Publishing Venue

IBM

Related People

Miles, GL: AUTHOR

Abstract

To assure integrity of insulation on sidewalls of polysilicon gate conductors, initial silicon dioxide (SiO2) sidewall spacers are isotropically etched slightly and then encapsulated in silicon nitride (Si3N4).

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Nitride Encapsulated Spacer

To assure integrity of insulation on sidewalls of polysilicon gate conductors, initial silicon dioxide (SiO2) sidewall spacers are isotropically etched slightly and then encapsulated in silicon nitride (Si3N4).

Referring to the Fig. 1, SiO2 sidewall spacers 12 are formed on sides of polysilicon line 14 which is disposed over substrate 16 by standard processing. Junction implantation and anneal is then performed as usual.

Referring to Fig. 2, spacers 12 are isotropically etched. Then, as shown in Fig. 3, Si3N4 18 is conformally deposited and anisotropically etched to leave encapsulating layer 18.

Thus, dual layer sidewall spacers are constructed having protection from attack by high temperature and cleaning treatments later in the integrated circuit process.

Disclosed anonymously.

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